Peripheral Clock Management
AssigneeAmbiq Micro, Inc.
InventorStephen James Sheafor
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Abstract
A clock generator for use in an electronic system comprising an integrated circuit such as a microcontroller. A plurality of oscillators are selectively enabled to produce a respective plurality of oscillator signals. For each of a plurality of clock outputs, a mux selects a respective one of the oscillator signals in response to a respective select signal provided by a clocked facility. The selected oscillator signal is gated out as the respective clock signal in response to a respective gate signal also provided by the clocked facility.
Claims11
A clock management method for use in a system comprising m clocked facilities, the method comprising the steps of:
- [1.1] developing n oscillation signals;
- [1.2] receiving a select signal from each of the clocked facilities;
- [1.3] selecting a respective one of said n oscillation signals in response to each select signal;
- [1.4] receiving an enable signal from each of the clocked facilities;
- and
- [1.5] providing to each of the clocked facilities a clock signal comprising the selected oscillation signal in response to a respective enable signal.
A clock management method for use in a system comprising m clocked facilities, the method comprising the steps of:
- [1.1] disabling n oscillators, each adapted to develop a respective one of n oscillation signals;
- [1.2] receiving an assertion of a select signal from each of the clocked facilities;
- [1.3] enabling a respective one of said n oscillators to develop a respective oscillation signal in response to each asserted select signal;
- [1.4] receiving an assertion of an enable signal from each of the clocked facilities;
- and
- [1.5] providing to each of the clocked facilities a clock signal comprising the selected oscillation signal in response to the assertion of a respective enable signal.
A clock management facility configured to perform the method of any preceding claim.
Dependencies are inferred from the claim text.