Semiconductor device

A semiconductor device comprising:

• a first semiconductor chip which includes a P-channel MOSFET including a source, a gate and a drain;
• a second semiconductor chip which includes a N-channel MOSFET including a source, a gate and a drain;
• a third semiconductor chip which includes a driver circuit for driving a gate of the P-channel MOSFET and a gate of the N-channel MOSFET;
• a resin encapsulator encapsulating the first, second and third semiconductor chips;
• an input power supply terminal exposed from the resin encapsulator and configured to be used for supplying an input power;
• a reference potential supply terminal exposed from the resin encapsulator and configured to be used for receiving a reference potential;
• an output terminal exposed from the resin encapsulator and configured to be used for outputting an output;
• wherein the source and the drain of the P-channel MOSFET are coupled to the input power supply terminal and the output terminal, respectively,
• wherein the drain and the source of the N-channel MOSFET are coupled to the output terminal and the reference potential supply terminal, respectively,
• wherein the drain of the P-channel MOSFET and the drain of the N-channel MOSFET are electrically and mechanically coupled to a metal material which is electrically coupled to the output terminal,
• wherein the P-channel MOSFET comprises:
• a semiconductor substrate of the first semiconductor chip having a first surface and a second surface;
• a trench formed to extend from the first surface of the semiconductor substrate toward the second surface thereof;
• a gate insulating film formed over an inner wall surface of the trench;
• a gate electrode, as the gate, formed over the gate insulating film;
• p type semiconductor regions, as the source, which are formed in the first surface and formed at both ends of the gate electrode;
• n type semiconductor regions for channel formation formed at side faces of the gate electrode and formed between the source and drain semiconductor regions;
• and
• a drain semiconductor region, as the drain, formed in the second surface,
• wherein the N-channel MOSFET comprises:
• a semiconductor substrate of the second semiconductor chip having a first surface and a second surface;
• a trench formed to extend from the first surface of the semiconductor substrate toward the second surface thereof;
• a gate insulating film formed over an inner wall surface of the trench;
• a gate electrode, as the gate, formed over the gate insulating film;
• n type semiconductor regions, as the source, which are formed in the first surface and formed at both ends of the gate electrode;
• p type semiconductor regions for channel formation formed at side faces of the gate electrode and formed between the source and drain semiconductor regions;
• and
• a drain semiconductor region, as the drain, formed in the second surface.