System and method for eliminating indeterminism in integrated circuit testing

A method for enabling deterministic launch of a test transaction in an integrated circuit that includes a functional module, the method comprising:

• generating a test transaction and applying said test transaction to the integrated circuit via a test port;
• generating a trigger signal;
• and
• inhibiting or enabling the test transaction from reaching an interface of the functional module, dependent on a logical state of the trigger signal.

An integrated circuit, comprising:

• a functional module;
• a clock generator for providing a first clock signal;
• a clock module, operably coupled to the clock generator, for dividing the first clock signal to produce a second clock signal on receipt of an externally-generated enable signal;
• a latch module, operably coupled to the clock generator and to the clock module, for receiving an externally-generated trigger signal at an input thereof and for propagating the trigger signal to an output thereof under the control of the first and second clock signals;
• and
• a gate module, operably coupled to the latch module, for receiving the propagated trigger signal from the output of the latch module and an externally-generated test transaction, and for gating or enabling the test transaction for application to an interface of the functional module dependent on a logical state of the propagated trigger signal.