Crisscross cancellation protocol
AssigneeMicrosoft Technology Licensing, LLC
InventorsAtul Adya, Alastair Wolman, John D. Dunagan
Life of this patent
Estimating the term…
Abstract
Technologies, systems, and methods for ordered message delivery that avoid message races or crisscrosses between communicating nodes. For example, if Node A sends message 3 towards Node B and, shortly thereafter, Node B sends message X to Node A, Node A would like to know whether or not message X reflects Node B's state after receiving message 3. If Node B received message 3 prior to sending message X, then proper state may be maintained between the nodes. But if messages 3 and X crisscrossed, or if message 3 was never properly received by Node B, then the state between the nodes may be corrupt. Technologies, systems, and methods are provided to avoid such corruption.
Claims20
A method performed on an electronic device that includes memory, the method comprising:
- receiving, by the electronic device while a state of a protocol is set to a race fix state, an incoming message that conforms to the protocol, where the incoming message includes a header that includes a first set of state variables comprising a nonce value and a remote nonce value and a counter value and a remote counter value, and where the memory comprises a second set of state variables of the protocol;
- validating, based on comparing the second set of state variables to the first set of state variables of the received incoming message, the received incoming message;
- updating, in response to the received incoming message being valid, the second set of state variables based on the first set of state variables;
- and
- setting, in response to the updating, the state to a normal state.
An electronic device comprising:
- a processor;
- memory coupled to the processor;
- a network adapter coupled to the processor and memory and via which the electronic device receives, while a state of a protocol is set to a race fix state, an incoming message that conforms to the protocol, where the incoming message includes a header that includes a first set of state variables comprising a nonce value and a remote nonce value and a counter value and a remote counter value, and where the memory comprises a second set of state variables of the protocol;
- the processor via which the electronic device validates, based on comparing the second set of state variables to the first set of state variables of the received incoming message, the received incoming message;
- the processor via which the electronic device updates, in response to the received incoming message being valid, the second set of state variables based on the first set of state variables;
- and
- the processor via which the electronic device sets, in response to the updating, the state to a normal state.
At least one computer storage device comprising:
- memory that includes computer-executable instructions that, based on execution by an electronic device, configure the electronic device to perform actions comprising:
- receiving, by the electronic device while a state of a protocol is set to a race fix state, an incoming message that conforms to the protocol, where the incoming message includes a header that includes a first set of state variables comprising a nonce value and a remote nonce value and a counter value and a remote counter value, and where the memory comprises a second set of state variables of the protocol;
- validating, based on comparing the second set of state variables to the first set of state variables of the received incoming message, the received incoming message;
- updating, in response to the received incoming message being valid, the second set of state variables based on the first set of state variables;
- and
- setting, in response to the updating, the state to a normal state.
Dependencies are inferred from the claim text.