Dual-strained nanowire and finfet devices with dielectric isolation

A device comprising:

• a silicon germanium (SiGe) strained relaxed buffer (SRB) formed on a silicon substrate, the SRB having a first region and a second region;
• two or more tensile strained silicon (Si) nanowires formed above the SRB first region;
• two or more SiGe nanowires formed above the SRB second region;
• first and second u-shaped nitride spacer formed on opposite ends of the Si and SiGe nanowires, the first and the second u-shaped nitride spacers each having a first wall closest to the Si and SiGe nanowires and a second wall furthest from the Si and SiGe nanowires;
• a first shallow trench isolation (STI) layer formed on the SiGe SRB and a second STI layer formed within each u-shaped nitride spacer;
• a first high-k metal gate (HKMG) wrapped around the two or more tensile strained Si nanowires;
• a second HKMG wrapped around the two or more compressive strained SiGe nanowires;
• and
• first and second source/drain regions formed on opposite sides of the first and the second HKMG, respectively.

A method comprising:

• forming a silicon germanium (SiGe) strained relaxed buffer (SRB) on a silicon substrate, the SiGe SRB having a first region and a second region;
• forming a tensile strained silicon (Si)/SiGe stack on the SRB first region;
• forming a compressive strained Si/SiGe stack on the SRB second region;
• forming a first fin from the tensile strained Si/SiGe stack and the SiGe SRB and a second fin from the compressive strained Si/SiGe stack and SiGe SRB;
• anchoring portions of the first and second fins;
• and
• removing the SiGe from the Si/SiGe stack on the first region and the Si from the Si/SiGe stack on the second region, forming first and second tunnels, respectively.