Method for forming an implanted area for a heterojunction transistor that is normally blocked
AssigneeCommissariat A L'energie Atomique Et Aux Energies Alternatives
InventorErwan MORVAN
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Abstract
The invention relates to a method for manufacturing a heterojunction transistor (1), said method comprising the steps of: forming an implanted area (8) by ionically implanting magnesium, calcium, zinc, or fluorine in a first gallium nitride semiconductor layer (4), having a hexagonal crystalline structure, in the [0 0 0 1] orientation of said crystalline structure; forming a second semiconductor layer (6) on the first semiconductor layer so as to form an electron gas layer (5) at the interface between the first and second layers; and forming a control gate (75) over the second conductive layer (6) and vertically in line with the implanted area (8).
Claims13
A heterojunction transistor fabrication process, comprising:
- forming an implanted zone by ion implanting magnesium, calcium, zinc or fluorine in a first semiconductor layer of gallium nitride of hexagonal crystal structure in line with the [0001] direction of the crystal structure;
- forming a second semiconductor layer on the first semiconductor layer so as to form an electron gas layer at an interface between the first and second semiconductor layers;
- and
- forming a control gate above the second conductive layer plumb with the implanted zone.
Dependencies are inferred from the claim text.