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US 2016/0104776 A1Published application
High Mobility Devices with Anti-Punch Through Layer and Methods of Forming Same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Ching, Ka-Hing Fung, Zhiqiang Wu
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Abstract
An embodiment semiconductor device includes a fin extending upwards from a semiconductor substrate. The fin includes an anti-punch through (APT) layer having APT dopants and a channel region over the APT layer. The channel region is substantially free of APT dopants. The semiconductor device further includes a conductive gate stack on a sidewall and a top surface of the channel region.
Claims20
A semiconductor device comprising:
- a first fin extending upwards from a semiconductor substrate, wherein the first fin comprises:
- a first anti-punch through (APT) layer comprising APT dopants;
- and
- a first channel region over the first APT layer, wherein the first channel region is substantially free of APT dopants;
- and
- a conductive gate stack on a sidewall and a top surface of the first channel region.
3 more elements
A semiconductor device comprising:
- a first fin field effect transistor (finFET) comprising:
- a first anti-punch through (APT) layer comprising first APT dopants of a first type;
- and
- a first semiconductor layer over the first APT layer;
- a first conductive gate stack on sidewalls and a top surface of the first semiconductor layer;
- and
- first source and drain regions adjacent the first conductive gate stack;
- and
- a second finFET comprising:
- a second APT layer comprising second APT dopants of the first type and third APT dopants of a second type different than the first type;
- a second semiconductor layer over the second APT layer;
- a second conductive gate stack on sidewalls a top surface of the second semiconductor layer;
- and
- second source and drain regions adjacent the second conductive gate stack.
11 more elements
A method for forming a semiconductor device, the method comprising:
- forming an anti-punch through (APT) layer over a semiconductor substrate, wherein the APT layer comprises first APT dopants;
- forming a semiconductor layer over the APT layer;
- patterning the semiconductor layer and the APT layer to define a first fin extending upwards from the semiconductor substrate, wherein the first fin comprises a first APT layer portion and a first semiconductor layer portion;
- and
- forming a conductive gate stack on a top surface and a sidewall of the first semiconductor layer portion of the first fin.
2 more elements
Dependencies are inferred from the claim text.