Semiconductor Memory Devices and Methods of Fabricating the Same
AssigneeSamsung Electronics Co., Ltd.
InventorsWon-Seok Jung, Youngok Kim, Jihye Kim, Kyungjoong Joo
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Abstract
A semiconductor memory device may include stacks arranged in a first direction and vertical channel structures provided through the stacks. Each of the stacks may include gate electrodes and insulating layers alternately stacked on a substrate. Each of the vertical channel structures may include a semiconductor pattern connected to the substrate and a vertical channel pattern connected to the semiconductor pattern. Each of the semiconductor patterns may have a recessed sidewall, and the semiconductor patterns may have minimum widths different from each other.
Claims20
A semiconductor memory device, comprising:
- stacks separated from each other in a first direction by a trench, each of the stacks comprising insulating layers and gate electrodes alternately and repeatedly stacked on a substrate;
- first and second semiconductor patterns arranged along the first direction, each of the first and second semiconductor patterns being inserted in a lower portion of each of the stacks and being connected to the substrate;
- first and second vertical channel patterns in each of the stacks on the respective first and second semiconductor patterns;
- and
- a common source plug in the trench,
- wherein the first semiconductor pattern is closer to the trench than the second semiconductor pattern, and
- wherein a minimum width of the first semiconductor pattern is less than that of the second semiconductor pattern.
A semiconductor memory device, comprising:
- stacks separated from each other in a first direction by a trench, each of the stacks comprising insulating layers and gate electrodes alternately and repeatedly stacked on a substrate;
- semiconductor patterns arranged along the first direction, each of the semiconductor patterns being inserted in a lower portion of each of the stacks and being connected to the substrate;
- vertical channel patterns in each of the stacks on the respective semiconductor patterns;
- and
- a common source plug in the trench,
- wherein at least one of the semiconductor patterns has recessed sidewalls, which are opposite to each other in the first direction, and
- wherein the maximum recess depths of the recessed sidewalls are different from each other.
A semiconductor memory device, comprising:
- a substrate having a first common source region and a second common source region in an upper surface thereof, the first and second common source regions spaced apart from each other in a first direction and extending in a second direction that is perpendicular to the first direction;
- a plurality of insulating layers and a plurality of gate electrodes alternately and repeatedly stacked on the upper surface of the substrate in between the first and second common source regions, the insulating layers and gate electrodes stacked in a third direction that is perpendicular to the first and second directions;
- first and second semiconductor patterns that extend upwardly from the substrate, the first and second semiconductor patterns spaced apart from each other along the first direction;
- and
- first and second vertical channel patterns on the respective first and second semiconductor patterns,
- wherein a first portion of the lowermost of the gate electrodes that is between the first and second semiconductor patterns has a first thickness adjacent the first semiconductor pattern and a second thickness adjacent the second semiconductor pattern, where the first thickness exceeds the second thickness.
Dependencies are inferred from the claim text.