Method and structure for transistors using gate stack dopants with minimal nitrogen penetration
AssigneeGlobalfoundries Inc.
InventorsBalaji Kannan, Unoh Kwon, Rekha Rajaram
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Abstract
Embodiments of the present invention provide CMOS structures and methods of gate formation that combine a keep-cap scheme in which a protective layer is maintained on a PFET during a replacement metal gate process that utilizes an NFET-first process flow. Selective nitridation is used to provide nitrogen to the NFET while the PFET is protected from nitrogen by the keep-cap. Additional dopants are provided to the NFET using a gate stack dopant material (GSDM) layer.
Claims20
A method of forming a semiconductor structure comprising an N-type region and a P-type region, the method comprising:
- forming a dielectric layer on a semiconductor substrate;
- forming a keep-cap layer on the dielectric layer;
- removing the keep-cap layer from the N-type region while preserving the keep-cap layer on the P-type region;
- forming a gate stack dopant material (GSDM) layer on the dielectric layer in the N-type region and simultaneously forming the GSDM layer on the keep-cap layer in the P-type region;
- forming a sacrificial titanium nitride layer on the GSDM layer;
- performing an anneal;
- removing the sacrificial titanium nitride layer;
- removing the GSDM layer from a top surface of the dielectric layer in the N-type region, while preserving the GSDM layer in the P-type region;
- performing a selective nitridation process;
- forming an N work function metal (NWFM) stack on the dielectric layer in the N-type region, and on the GSDM layer in the P-type region;
- removing the NWFM stack from the P-type region;
- removing the GSDM layer in the P-type region;
- and
- forming a P work function metal (PWFM) stack on the keep-cap layer in the P-type region and on the NWFM stack in the N-type region.
A method of forming a semiconductor structure comprising an N-type region and a P-type region, the method comprising:
- forming a dielectric layer on a semiconductor substrate;
- forming a keep-cap layer on the dielectric layer;
- removing the keep-cap layer from the N-type region while preserving the keep-cap layer on the P-type region;
- forming a gate stack dopant material (GSDM) layer on the dielectric layer in the N-type region and simultaneously forming the GSDM layer on the keep-cap layer in the P-type region;
- forming a sacrificial titanium nitride layer on the GSDM layer;
- performing an anneal;
- removing the sacrificial titanium nitride layer;
- removing the GSDM layer from a top surface of the dielectric layer in the N-type region, while preserving the GSDM layer in the P-type region;
- performing a selective nitridation process;
- removing the GSDM layer from the N-type region and the P-type region;
- forming a P work function metal (PWFM) stack on the keep-cap layer in the P-type region and on the dielectric layer in the N-type region;
- removing the PWFM stack from the N-type region;
- and
- forming an N work function metal (NWFM) stack on the dielectric layer in the N-type region, and on the PWFM stack in the P-type region.
A semiconductor structure, comprising:
- a semiconductor substrate comprising an N-type field effect transistor (NFET) region and a P-type field effect transistor (PFET) region;
- a dielectric layer disposed on the semiconductor substrate;
- a keep-cap layer disposed on the dielectric layer in the PFET region;
- an N-type work function metal (NWFM) stack disposed on the dielectric layer in the NFET region;
- a P-type work function metal (PWFM) stack disposed on the keep-cap layer in the PFET region, and on the NWFM stack in the NFET region;
- and
- a fill metal disposed on the PWFM stack.
Dependencies are inferred from the claim text.