Semiconductor devices including bit line contact plug and peripheral transistor

A semiconductor device comprising:

• a semiconductor substrate;
• a first trench and a second trench in a cell area;
• a first electrode and a first insulating layer in the first trench;
• a second electrode and a second insulating layer in the second trench;
• an isolation region beneath the first electrode in the semiconductor substrate;
• a bit line contact plug between the first trench and the second trench on the semiconductor substrate;
• a bit line on the bit line contact plug;
• and
• a peripheral transistor on the semiconductor substrate in a peripheral area, the peripheral transistor having a lower electrode and an upper electrode on the lower electrode,
• wherein the bit line contact plug and the lower electrode of the peripheral transistor are at the same level, and
• wherein the bit line and the upper electrode of the peripheral transistor are at the same level.

A semiconductor device comprising:

• a semiconductor substrate having first trenches and second trenches between the first trenches;
• first word lines in the first trenches and second word lines in the second trenches,
• the first word lines including first word line insulating layers and first word line electrodes in the first trenches, and
• the first word line insulating layers being between the first word line electrodes and the semiconductor substrate;
• isolation regions extending at least beneath the first word lines,
• the isolation regions extending in line-shapes in a first direction, and
• the isolation regions being deeper than the first word line insulating layers beneath the first word line electrodes;
• a plug on the semiconductor substrate, the plug being disposed between the second trenches;
• a bit line on the plug;
• and
• a transistor having a lower gate electrode and an upper gate electrode on the semiconductor substrate;
• wherein the bit line and the upper gate electrode of the transistor are disposed at the same level.