Methods for forming semiconductor device

An electronic device, comprising a semiconductor device and electronic components coupled to the semiconductor device, wherein the semiconductor device is formed by a method comprising:

• forming a first hard mask layer overlying a semiconductor substrate;
• forming a second hard mask layer overlying the first hard mask layer;
• forming trenches through the second hard mask, the first hard mask, and into the substrate;
• forming a dielectric material in the trenches to form shallow trench isolation regions;
• removing the second hard mask layer;
• forming a floating gate material overlying the first hard mask and the trenches;
• repeating a process of forming a buffer layer over the floating gate material and using a polishing process to remove a portion of the buffer layer and a top portion of the floating gate material until a top surface of the remaining buffer layer is coplanar with a top surface of the remaining portion of the floating gate material;
• and
• using a dry etch process to remove a portion of the floating gate material above the shallow trench isolation regions and the remaining portions of the first and second buffer layers.

A method for forming a semiconductor device, comprising:

• forming a first hard mask layer overlying a semiconductor substrate;
• forming a second hard mask layer overlying the first hard mask layer;
• forming trenches through the second hard mask, the first hard mask, and into the substrate;
• forming a dielectric material in the trenches to form shallow trench isolation regions;
• removing the second hard mask layer;
• forming a floating gate material overlying the first hard mask and the trenches;
• forming a first buffer layer over the floating gate material;
• using a polishing process to remove a portion of the first buffer layer and a top portion of the floating gate material;
• forming a second buffer layer over the floating gate material;
• using a polishing process to remove a portion of the second buffer layer and a top portion of the floating gate material;
• using a dry etch process to remove a portion of the floating gate material above the shallow trench isolation regions and the remaining portions of the first and second buffer layers.