Back to results
US 2016/0104543 A1Published application
Multi-Stage Sample and Hold Circuit
AssigneeSilicon Laboratories Inc.
InventorsMatthew R. Powell, Shouli Yan
Life of this patent
Estimating the term…
Abstract
A circuit may include a first sample node configured to provide a low precision sample of an input signal, a second sample node configured to store a high precision sample of an input signal, and a first switch circuit coupled between an input and the first sample node. The circuit may further include a second switch circuit coupled between the first sample node and the second sample node and configured to limit leakage current that could discharge the second sample node.
Claims20
A circuit comprising:
- a first sample node configured to provide a low precision sample of an input signal;
- a second sample node configured to store a high precision sample of an input signal;
- a first switch circuit coupled between an input and the first sample node;
- and
- a second switch circuit including bulk material contact area, a first node coupled to the first sample node, a control node responsive to a control signal, and a second node coupled to the second sample node, the bulk material contact area configured to receive a voltage signal configured to reduce current leakage between bulk material and at least one of the first node and the second node during a hold phase.
2 more elements
A circuit comprising:
- a first node to provide a first sampled voltage;
- a second node to store a second sampled voltage having a higher precision than the first sampled voltage;
- a first switch circuit coupled between an input and the first node;
- and
- a second switch circuit coupled between the first node and the second node, the second switch circuit including at least one transistor including a drain coupled to the second node, a source coupled to the first node, a gate responsive to a control signal, and a bulk material contact location configured to receive a signal.
2 more elements
A circuit comprising:
- a sample capacitor coupled between a first node and a power supply and configured to store a first sample of an input signal;
- a second node to hold a second sample of the input signal;
- and
- a switching circuit coupled between the first node and the second node and configured to couple the first node to the second node during a sample phase and to isolate the second node from the first node during a hold phase, the switching circuit configured to limit leakage current from the second node through the switching circuit during the hold phase.
1 more element
Dependencies are inferred from the claim text.