Novel otprom for post-process programming using selective breakdown
AssigneeGlobalfoundries Inc.
InventorsAkhilesh Gautam, Suresh Uppal, Min-hwa Chi
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Abstract
At least one method, apparatus and system disclosed involves hard-coding data into an integrated circuit device. An integrated circuit device provided. Data for hard-wiring information into a portion of the integrated circuit device is received. A stress voltage signal is provided to a portion of a transistor of the integrated circuit device for causing a dielectric breakdown of the portion of the transistor for hard-wiring the data.
Claims21
A method for hard-coding data into an integrated circuit device, comprising:
- providing an integrated circuit device;
- receiving data for hard-wiring said data into a portion of said integrated circuit device;
- and
- providing a stress voltage signal to a portion a transistor of said integrated circuit device for causing a dielectric breakdown of said portion of said transistor for hard-wiring said data.
An integrated circuit device, comprising:
- a transistor, comprising:
- a source region on a substrate;
- a gate region on said substrate adjacent said source region;
- and
- a drain region on said substrate adjacent said gate region;
- and
- a programming unit adapted to:
- receive data for hard-wiring said data into said transistor;
- provide an address signal for addressing at least one of said source, gate, or drain regions for dielectric breakdown;
- provide a bias condition for causing said dielectric breakdown of at least one of said source, gate, or drain regions based upon said address signal.
The integrated circuit device of claim 18, further comprising a controller, wherein said controller is adapted to read at least one of said logic high value or said logic low value.
A system, comprising:
- a semiconductor device processing system to provide an integrated circuit device, wherein said integrated circuit device comprises:
- at least one transistor, wherein said transistor comprises;
- a source region on a substrate;
- a gate region on said substrate adjacent said source region;
- and
- a drain region on said substrate adjacent said gate region;
- a programming unit adapted to:
- receive data for hard-wiring said data into said transistor;
- provide an address signal for addressing at least one of said source, gate, or drain regions for dielectric breakdown;
- provide a bias condition for causing said dielectric breakdown of at least one of said source, gate, or drain regions based upon said address signal;
- and
- a processing controller operatively coupled to said semiconductor device processing system, said processing controller configured to control an operation of said semiconductor device processing system.
Dependencies are inferred from the claim text.