Drift acceleration in resistance variable memory
AssigneeMicron Technology, Inc.
InventorsAlessandro Calderoni, Massimo Ferro, Paolo Fantini
Life of this patent
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Abstract
The present disclosure includes apparatuses and methods including drift acceleration in resistance variable memory. A number of embodiments include applying a programming signal to the resistance variable memory cell to program the cell to a target state, subsequently applying a pre-read signal to the resistance variable memory cell to accelerate a drift of a resistance of the programmed cell, and subsequently applying a read signal to the resistance variable memory cell.
Claims21
-20. (canceled)
A method of operating a resistance variable memory cell, comprising:
- applying a programming signal to the resistance variable memory cell to program the cell to a target state;
- and
- accelerating a drift of a resistance of the programmed resistance variable memory cell.
The method of claim 1, wherein applying the programming signal includes applying a reset signal to the resistance variable memory cell
The method of claim 1, wherein applying the programming signal includes applying a set signal to the resistance variable memory cell.
The method of claim 1, further comprising:
- applying a pre-read signal to the resistance variable memory cell;
- stopping the application of the pre-read signal at a desired point of operation;
- performing an action on the resistance variable memory cell;
- and
- restarting the application of the pre-read signal in response to completion of the performance of the action.
The method of claim 1, further comprising applying a read signal to the resistance variable memory cell subsequent to the drift acceleration.
The method of claim 1, wherein accelerating the drift increases a rate of stabilization of a state of the resistance variable memory cell.
An apparatus, comprising:
- an array of resistance variable memory cells;
- and
- a controller coupled to the array and configured to control applying a drift acceleration signal to a resistance variable memory cell.
The apparatus of claim 7, wherein the controller is further configured to control programming a selected memory cell to a target state.
The apparatus of claim 7, wherein the controller is further configured to control reading the selected memory cell.
The apparatus of claim 7, wherein the array of resistance variable memory cells is an array of phase change memory cells.
The apparatus of claim 7, wherein the controller is further configured to control subsequently applying a pre-read signal to the selected memory cell, wherein the pre-read signal is configured to accelerate drift of a resistance of the selected memory cell.
The apparatus of claim 11, wherein the controller is further configured to control subsequently applying the pre-read signal to the selected memory cell for a particular time interval.
A method of operating a phase change memory cell, comprising:
- accelerating a drift of a resistance variable memory cell by applying a signal.
The method of claim 13, further comprising accelerating the drift without performing an anneal process to induce structural relaxation.
The method of claim 13, further comprising:
- applying a pre-read signal to the phase change memory cell;
- and
- stopping the application of the pre-read signal at a desired point of operation.
The method of claim 13, wherein accelerating the drift increases a stability of a target state.
The method of claim 13, further comprising programming the resistance variable memory cell to a reset state.
The method of claim 17, further comprising subsequently applying a pre-read signal to the resistance variable memory cell.
The method of claim 18, further comprising reading the resistance variable memory cell, wherein the pre-read signal is configured to accelerate a drift of a resistance of the programmed memory cell.
The method of claim 18, wherein applying the pre-read signal includes applying a constant bias voltage over a particular time interval to the programmed resistance variable memory cell.
Dependencies are inferred from the claim text.