Semiconductor apparatus and system capable of reducing peak current in transmitting signals

A system comprising:

• a plurality of dies each including a first output control unit configured to output transmission data by aligning data outputted from a memory core;
• and
• a base die including a second output control unit configured to receive the transmission data through a through-via, and to output an output data by aligning the transmission data,
• wherein the first output control unit comprises a plurality of non-inversion pipes and a plurality of inversion pipes, and the second output control unit comprises a plurality of non-inversion pipes and a plurality of inversion pipes, and
• wherein the non-inversion pipes of the first output control unit are configured to non-invert and output a part of data, which is outputted from the memory core, to a signal transmission line, the inversion pipes of the first output control unit are configured to invert and output the other part of data, which is outputted from the memory core, to the signal transmission line, the non-inversion pipes of the second output control unit are configured to non-invert and output a part of the transmission data, and the inversion pipes of the second output control unit are configured to invert and output the other part of the transmission data.