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US 2016/0103784 A1Published application
Asymmetrical processor memory architecture
AssigneeCognivue Corporation
InventorsMalcolm Douglas Stewart, Daniel Claude Laroche, Trevor Graydon Burton, Ali Osman Ors
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Abstract
An asymmetrical processing system is provided. The processor has a vector unit comprised of one or more computational units coupled with a vector memory space and a scalar unit coupled with a data memory space and the vector memory space, the scalar unit accessing one or more memory locations within the vector memory space.
Claims22
An asymmetrical processing system comprising:
- a vector unit comprised of one or more computational units coupled with a vector memory space;
- and
- a scalar unit coupled with a data memory space and the vector memory space, the scalar unit accessing one or more memory locations within the vector memory space.
A method for accessing memory by a scalar unit of an asymmetrical processing system comprising:
- determining data memory ranges associated in a data memory space with vector memory of one or more computational units associated with a vector unit each computational unit having an associated range of memory locations in the vector memory;
- initiating an access to memory location associated with vector memory;
- determining a memory location in vector memory;
- accessing data in the vector memory location;
- and
- wherein a vector unit can concurrently access the vector memory location with the scalar unit.
3 more elements
Dependencies are inferred from the claim text.