Efficient interruption routing for a multithreaded processor

A system for implementing a modified priority routing of an input/output (I/O) interruption, comprising a processor and a memory:

• the processor being configured to:
• determine whether the I/O interruption is pending for a core;
• determine whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption based upon determining that the I/O interruption is pending;
• determine whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state;
• and
• based upon determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, route the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

A computer program product, the computer program product comprising a computer readable storage medium having program instructions implementing a modified priority routing of an input/output (I/O) interruption embodied therewith, the program instructions executable by a processor to cause the processor to:

• determine whether the I/O interruption is pending for a core;
• determine whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption based upon determining that the I/O interruption is pending;
• determine whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state;
• and
• based upon determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, route the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.