Processing device and method thereof

A processing device, comprising:

• an interconnect bus;
• at least a processor operatively coupled to the interconnect bus;
• at least one integrated peripheral, IP, operatively coupled to the interconnect bus;
• and
• a monolithic memory accumulator unit, MMA, operatively coupled to the interconnect bus;
• wherein the at least one IP is operable in an storage operating mode, in which the IP ceases to serve services in accordance with the intended purpose of use and in which storage resources thereof are made accessible through the interconnect bus;
• wherein the MMA is configured to expose a virtual memory space to the interconnect bus and comprises a conversion table with translation information to translate transaction requests with virtual addresses into one or more transaction requests with physical addresses, wherein the MMA is further configured to
• receive a transaction request directed to a virtual address of the exposed virtual address space;
• translate the virtual address of the received transaction request into one or more physical addresses;
• and
• pass on one or more transaction requests each directed to one of the one or more storage locations of the at least one IP, which are identified by the one or more physical addresses.