Lookup of a data structure containing a mapping between a virtual address space and a physical address space
AssigneeHewlett-Packard Development Company, L.P.
InventorsNaveen Muralimanohar, Kevin T. Lim, Norman Paul Jouppi, Doe Hyun Yoon
Life of this patent
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Abstract
A memory region stores a data structure that contains a mapping between a virtual address space and a physical address space of a memory. A portion of the mapping is cached in a cache memory. In response to a miss in the cache memory responsive to a lookup of a virtual address of a request, an indication is sent to the buffer device. In response to the indication, a hardware controller on the buffer device performs a lookup of the data structure in the memory region to find a physical address corresponding to the virtual address.
Claims15
A method comprising:
- storing, in a memory region coupled to a buffer device, a data structure that contains a mapping between a virtual address space and a physical address space of a memory, wherein the memory region storing the data structure has a lower access latency than the memory, and wherein the buffer device is between the memory and a data requester;
- caching, in a cache memory, a portion of the mapping;
- in response to a miss in the cache memory responsive to a lookup of a virtual address of a memory request,
- sending an indication to the buffer device;
- in response to the indication, performing, by a hardware controller on the buffer device, a lookup of the data structure in the memory region to find a physical address corresponding to the virtual address.
A system comprising:
- a processor;
- a memory;
- a buffer device between the processor and the memory;
- a memory region coupled to the buffer device and storing a page table that maps between a virtual address space and a physical address space, wherein the memory region storing the page table has a lower access latency than the memory,
- wherein the buffer device includes a page table walk logic responsive to an indication to perform a lookup of the page table, wherein the indication is responsive to a miss in a translation lookaside buffer that stores a portion of the page table when looking up a physical address for a virtual address of a request from the processor, and wherein the lookup of the page table in the memory region generates the physical address.
A buffer device for provision between a data requester and a memory, the buffer device comprising:
- a memory region to store a data structure that contains a mapping between a virtual address space and a physical address space of the memory, wherein the memory region storing the data structure has a lower access latency than the memory;
- and
- a hardware controller to:
- receive an indication that is responsive to a miss in a cache memory storing a portion of the data structure, the miss being responsive to a lookup in the cache memory of a virtual address specified in a request from the data requester;
- in response to the indication, perform a lookup of the data structure in the memory region to find a physical address corresponding to the virtual address.
Dependencies are inferred from the claim text.