Clock signal generating circuit

#This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2014-207188, filed on Oct. 8, 2014, the entire contents of which are incorporated herein by reference.

#The present disclosure relates to a clock signal generating circuit.

#As electronic devices become multi-functional, achieve high speed, and are highly integrated, electro-magnetic interference (EMI) due to electromagnetic radiation emitted from large scale integration (LSI) mounted thereon is problematic. Rigid international standards for EMI exist for, in particular, LSI for vehicle devices and LSI for industrial devices, as well as an LSI mounted on consumer equipment, and LSI that fails to meet the requirements cannot be mounted on vehicle devices or industrial devices.

#FIG. 1 is a block diagram illustrating a basic configuration example of a clock signal generating circuit.

#FIG. 2 is a circuit diagram illustrating a configuration example of an oscillator 130.

#FIG. 3 is a circuit diagram illustrating a configuration example of a trimming function part 139.

#FIG. 1 is a block diagram illustrating a basic configuration example of a clock signal generating circuit. The clock signal generating circuit 100 of this configuration example is a base circuit (a clock signal generating circuit having a trimming function) that can implement a frequency spreading function (to be described later), and includes a trimming data holding part 110, a register 120, and an oscillator 130.

#The trimming data holding part 110 holds trimming data S11 in a non-volatile manner using a non-volatile memory (one-time programmable read only memory (OTPROM) in the drawing) or a known method such as a Zener zap method, a polysilicon fuse method, or a laser cutting method. Further, the trimming data S11 is a data signal for arbitrarily adjusting an oscillation frequency f1 of a clock signal S13 generated by the oscillator 130.

#The register 120 stores the trimming data S11 read from the trimming data holding part 110, as register data S12, in a predetermined address.