Phase-locked loop (pll)-type resolver/converter method and apparatus
AssigneeQatar University
InventorMohieddine BENAMMAR
Life of this patent
Estimating the term…
Abstract
An apparatus and method for determining an angle ψ an estimate of a true angle θ from a resolver excitation signal Vex(t)=A sin(ωt) and modulated resolver output signals Vs(t,θ)=A×sin(θ)×sin(ωt) and VC(t,θ)=A×cos(θ)×sin(ωt), where ω is an angular frequency and t is time, is provided. The apparatus may include a converter comprising a closed loop phase-locked loop (PLL) system configured to produce an angle ψ and two digital signals BitØ(θ) and Bit1(θ) for estimating the true angle θ using Vex(t), Vs(t,θ) and VC(t,θ) signals.
Claims12
An apparatus for determining an angle ψ an estimate of a true angle θ from a resolver excitation signal Vex(t)=A sin(ωt) and modulated resolver output signals Vs (t,θ)=A×sin(θ)×sin(ωt) and VC(t,θ)=A×cos(θ)×sin(ωt) where ω is an angular frequency and t is time, the apparatus comprising:
- a converter comprising a closed loop phase-locked loop (PLL) system configured to produce an angle ψ and two digital signals BitØ(θ) and Bit1(θ) for estimating the true angle θ using Vex(t), Vs(t,θ) and VC(t,θ) signals.
A method, comprising:
- determining an angle ψ an estimate of a true angle θ from a resolver excitation signal Vex(t)=A sin(ωt) and modulated resolver output signals Vs(t,θ)=A×sin(θ)×sin(ωt) and VC(t,θ)=A×cos(θ)×sin(ωt), where ω is an angular frequency and t is time,
- wherein the determining comprises producing, by a converter comprising a closed loop phase-locked loop (PLL) system, an angle ψ and two digital signals BitØ(θ) and Bit1(θ) for estimating the true angle θ using Vex(t), Vs(t,θ) and VC(t,θ) signals.
An apparatus, comprising:
- determining means for determining an angle ψ an estimate of a true angle θ from a resolver excitation signal Vex(t)=A sin(ωt) and modulated resolver output signals Vs(t,θ)=A×sin(θ)×s in (ωt) and VC(t,θ)=A×cos(θ)×sin(ωt), where ω is an angular frequency and t is time,
- wherein the determining means comprises means for producing, by a converter comprising a closed loop phase-locked loop (PLL) system, an angle ψ and two digital signals BitØ(θ) and Bit1(θ) for estimating the true angle θ using Vex(t), Vs(t,θ) and VC(t,θ) signals.
Dependencies are inferred from the claim text.