Hardware accelerator for handling red-black trees

A hardware accelerator for handling red-black trees, each tree including multiple nodes, each node including data fields of predefined length representing:

• a color indicator, taking a binary value;
• a key;
• an address of another node in the same tree, termed a parent;
• an address of another node in the same tree, termed a left child;
• and
• an address of another node in the same tree, termed a right child;
• said hardware accelerator including:
• at least two registers termed node registers, capable of storing the set of fields of two nodes of a tree;
• and
• logic units configured for receiving from a processor at least one input data item selected from an address of a tree node and a reference key, as well as at least one instruction to be executed;
• for executing said instruction by performing a combination of the following operations:
• sending an address to a memory, receiving from said memory the set of data fields of the node of said tree corresponding to said address and writing them in a register replacing the data fields;
• sending to said memory the set of data fields of a node of said tree as well as an address of said memory in which said data fields must be recorded;
• changing the value of a color indicator stored in a node register;
• and
• exchanging therebetween two addresses stored in two node registers;
• and for supplying said processor with at least one output data item including an address stored in a register node.