Apparatus and method for consolidating memory access prediction information to prefetch cache memory data

A method of controlling an operation processing device including a cache memory configured to hold data, a control unit configured to execute prefetch that holds data from a main memory to the cache memory, a prediction information storage unit configured to store prediction information into a plurality of areas thereof, the prediction information being referenced by the control unit to determine whether to execute the prefetch in a case where a plurality of unrolled instructions produced by unrolling a target instruction included in a loop sentence are executed individually, the prediction information corresponding to individual memory accesses executed at certain address intervals in accordance with the respective unrolled instructions, and a number-of-unrolling storage unit configured to store a number-of-unrolling information corresponding to a number of unrolled instructions when the target instruction is unrolled into the plurality of unrolled instructions, the method comprising:

• causing an operation processing unit included in the operation processing device to execute memory access to the main memory;
• and
• causing a consolidation unit included in the operation processing device to, when the plurality of unrolled instructions are executed individually, generate consolidated prediction information by consolidating a plurality of pieces of prediction information respectively stored in the plurality of areas of the prediction information storage unit into one based on the number-of-unrolling information, and store the consolidated prediction information into any one of the plurality of areas.

An apparatus connected to a main memory, the apparatus comprising:

• a cache memory configured to hold data;
• a memory configured to store prediction information in a plurality of areas thereof, and store a number-of-unrolling information corresponding to a number of unrolled instructions when the target instruction is unrolled into the plurality of unrolled instructions, the prediction information being referenced to determine whether to execute prefetch, which holds data from the main memory to the cache memory, in a case where a plurality of unrolled instructions produced by unrolling a target instruction included in a loop sentence are executed individually, the prediction information corresponding to individual memory accesses executed at certain address intervals in accordance with the respective unrolled instructions;
• and
• a processor configured:
• to execute memory access to the main memory,
• to execute the prefetch, and
• to, when the plurality of unrolled instructions are executed individually, generate consolidated prediction information by consolidating a plurality of pieces of prediction information respectively stored in the plurality of areas of the memory into one based on the number-of-unrolling information, and store the consolidated prediction information into any one of the plurality of areas.