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US 2016/0098313 A1Published application
Watchdog method and device
AssigneeFreescale Semiconductor, Inc.
InventorWilliam C. Moyer
Life of this patent
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Abstract
Each task assigned to a core can be considered an “active” task. Sequential strobe signals of a watchdog signal can be spaced apart in time by a certain duration. The duration between strobe signals is longer than the expected duration of an active task. By knowing that all tasks being monitored are expected to execute within an expected amount of time, the duration between the strobe signals can be set to be longer than that expected amount of time. If a task has not transitioned to inactive by a next strobe, a watchdog error has occurred.
Claims20
A method comprising:
- in response to a watchdog check signal being asserted at a first time, storing a first indicator that indicates a state of a first task of a data processor at the first time;
- in response to the watchdog check signal being asserted at the first time, storing a second indicator that indicates a state of a second task of the data processor at the first time;
- determining, based on the first and second indicators at a second time, whether at least one of the first or second task has been active since the first time;
- and
- in response to determining that at least one of the first or second task has been active since the first time active, asserting an error indicator.
2 more elements
A data processor device comprising:
- a task scheduler configured to assign a plurality of tasks to a corresponding plurality of task identifiers;
- a task state tracker configured to generate a state indicator for each one of the plurality of tasks that indicates whether a task is active or inactive;
- a watchdog status register having a plurality of storage locations, each storage location to store a task identifier of a corresponding one of the plurality of tasks;
- a watchdog check circuit configured to generate a watchdog check signal that is periodically asserted;
- watchdog monitor circuit, coupled to the watchdog status register, to the watchdog check circuit, and to the task state tracker, that is configured to assert each storage location of the plurality of storage locations corresponding to a task having an active state indicator at the time the check signal is asserted, and to negate each storage location of the plurality of storage locations corresponding to a task having an inactive state indicator at the time the check signal is asserted, and
- error detect circuitry, coupled the watchdog status register and to the watchdog check circuit, configured to generate a watchdog error in response one or more of the plurality of storage locations being asserted at the time the check signal is asserted.
3 more elements
A method comprising:
- in response to receiving an asserted watchdog check signal at a first time, storing a first indicator at a first storage location that indicates the first task of a data processor is active at the first time;
- receiving a negated watchdog check signal at a second time that is contiguous to, and after, the first time;
- in response to the watchdog check signal being asserted at a third time that is contiguous to, and after, the second time, asserting a watchdog error indicator in response to determining that the first indicator is stored at the first storage location.
Dependencies are inferred from the claim text.