US 2016/0098274 A1 · LOAD-MONITOR MWAIT

Abstract

Techniques are disclosed relating to suspending execution of a processor thread while monitoring for a write to a specified memory location. An execution subsystem may be configured to perform a load instruction that causes the processor to retrieve data from a specified memory location and atomically begin monitoring for a write to the specified location. The load instruction may be a load-monitor instruction. The execution subsystem may be further configured to perform a wait instruction that causes the processor to suspend execution of a processor thread during at least a portion of an interval specified by the wait instruction and to resume execution of the processor thread at the end of the interval. The wait instruction may be a monitor-wait instruction. The processor may be further configured to resume execution of the processor thread in response to detecting a write to a memory location specified by a previous monitor instruction.

Claims20

Dependent claims

1-20. (canceled)

Dependencies are inferred from the claim text.

Facts

Application

14/967,954Filed 14 Dec 2015

Priority

7 Sep 2012

Published

7 Apr 2016

Term ends

Not estimatedThe source records don’t support an estimate.

Classification13 codes

G06F 9/30043
To perform operations on memory: lOAD or STORE instructions; Clear instruction
G06F 9/3009
To perform miscellaneous control operations, e.g. NOP: thread control instructions
G06F 9/3851
Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution: from multiple instruction streams, e.g. multistreaming
G06F 11/0715
The processing taking place on a specific hardware platform or in a specific software environment: in a system implementing multitasking

Load-monitor mwait

Life of this patent

Load-monitor mwait

Life of this patent

Abstract

Claims20