Back to results
US 2016/0098220 A1Published application
Method for wear leveling in a nonvolatile memory
AssigneeSTMicroelectronics (Rousset) SAS
InventorHubert Rousseau
Life of this patent
Estimating the term…
Abstract
A method for writing and reading data in memory cells, comprising, when writing a data in a block of a first memory zone, a step consisting of writing in a second memory zone a temporary information structure metadata comprising a start flag, an identifier of the temporary information structure, an information about the location of the block in the first memory zone, and a final flag, and, after a power on of the first memory zone, searching for an anomaly in temporary information structures present in the second memory zone.
Claims21
A method of writing and reading data in electrically erasable and programmable nonvolatile memory cells, the method comprising:
- writing data in a block of a first nonvolatile memory zone that is programmable by block;
- in conjunction with the writing the data in the block of the first nonvolatile memory zone, writing in a second nonvolatile memory zone containing metadata associated with data in the first nonvolatile memory zone, metadata associated with the writing of the data in the block, the metadata being written in a temporary information structure associated with the writing of the data in the block, wherein the temporary information structure associated with the writing of the data in the block includes:
- a start flag;
- an identifier of the temporary information structure;
- an information about a location of the block in the first nonvolatile memory zone, wherein the information included in the temporary information structure about the location of the block in the first nonvolatile memory zone includes information about a location in the second nonvolatile memory zone of a metadata structure associated with a block to program in the first nonvolatile memory zone;
- and
- a final flag;
- and
- in conjunction with a power-on of the first nonvolatile memory zone, searching for an anomaly in temporary information structures present in the second nonvolatile memory zone.
6 more elements
An integrated circuit, comprising:
- a processing unit;
- and
- at least one nonvolatile memory, communicatively coupled to the processing unit, comprising electrically erasable and programmable memory cells, wherein the processing unit is configured to receive write or read commands and to execute commands that cause the following to be performed:
- writing data in a block of a first nonvolatile memory zone that is programmable by block;
- in conjunction with the writing the data in the block of the first nonvolatile memory zone, writing in a second nonvolatile memory zone containing metadata associated with data in the first nonvolatile memory zone, metadata associated with the writing of the data in the block, the metadata being written in a temporary information structure associated with the writing of the data in the block, wherein the temporary information structure associated with the writing of the data in the block includes:
- a start flag;
- an identifier of the temporary information structure;
- an information about a location of the block in the first nonvolatile memory zone, wherein the information included in the temporary information structure about the location of the block in the first nonvolatile memory zone includes information about a location in the second nonvolatile memory zone of a metadata structure associated with a block to program in the first nonvolatile memory zone;
- and
- a final flag;
- and
- in conjunction with a power-on of the first nonvolatile memory zone, searching for an anomaly in temporary information structures present in the second nonvolatile memory zone.
9 more elements
A portable device comprising:
- a portable device housing;
- and
- an integrated circuit within the housing, the integrated circuit comprising:
- a processing unit;
- and
- at least one nonvolatile memory, communicatively coupled to the processing unit, comprising electrically erasable and programmable memory cells, wherein the processing unit is configured to receive write or read commands and to execute commands that cause the following to be performed:
- writing data in a block of a first nonvolatile memory zone that is programmable by block;
- in conjunction with the writing the data in the block of the first nonvolatile memory zone, writing in a second nonvolatile memory zone containing metadata associated with data in the first nonvolatile memory zone, metadata associated with the writing of the data in the block, the metadata being written in a temporary information structure associated with the writing of the data in the block, wherein the temporary information structure associated with the writing of the data in the block includes:
- a start flag;
- an identifier of the temporary information structure;
- an information about a location of the block in the first nonvolatile memory zone, wherein the information included in the temporary information structure about the location of the block in the first nonvolatile memory zone includes information about a location in the second nonvolatile memory zone of a metadata structure associated with a block to program in the first nonvolatile memory zone;
- and
- a final flag;
- and
- in conjunction with a power-on of the first nonvolatile memory zone, searching for an anomaly in temporary information structures present in the second nonvolatile memory zone.
12 more elements
Dependencies are inferred from the claim text.