Level shift and inverter circuits for gan devices
AssigneeNavitas Semiconductor Limited
InventorsDaniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
Life of this patent
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Abstract
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
Claims22
A level shift circuit comprising:
- a first GaN-based inverter circuit comprising:
- a first input terminal;
- a first output terminal;
- and
- a first inversion circuit coupled between the first input and the first output terminals and configured to receive a first input logic signal at the first input terminal and in response, provide a first inverted output logic signal at the first output terminal, wherein the first input and the first inverted output logic signals can be referenced to different voltage potentials.
An electronic power conversion component comprising:
- a package base;
- one or more GaN-based dies secured to the package base and comprising a first GaN-based inverter circuit comprising:
- a first input terminal;
- a first output terminal;
- and
- a first inversion circuit coupled between the first input and the first output terminals and configured to receive a first input logic signal at the first input terminal and in response, provide a first inverted output logic signal at the first output terminal, wherein the first input and the first inverted output logic signals can be referenced to different voltage potentials.
A method of operating GaN-based level shift circuit, the method comprising:
- transmitting a first input logic signal to a first input terminal and in response, a first inversion circuit providing an inverted first output logic signal on a first output terminal to control a gate of a power transistor.
Dependencies are inferred from the claim text.