Power semiconductor device and gate driver circuit
AssigneeKabushiki Kaisha Toshiba
InventorRyota Miwa
Life of this patent
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Abstract
A power semiconductor device includes a first output transistor connected to a first node at a first end of a current path thereof. The power semiconductor device further includes a second output transistor connected to a second end of the current path of the first output transistor at a first end of a current path thereof and to a second node at a second end of the current path. The power semiconductor device further includes a gate driver circuit that controls the first and second output transistors.
Claims20
A power semiconductor device, comprising:
- a first output transistor connected to a first node at a first end of a current path thereof;
- a second output transistor connected to a second end of the current path of the first output transistor at a first end of a current path thereof and to a second node at a second end of the current path;
- and
- a gate driver circuit that controls the first output transistor,
- wherein the gate driver circuit comprises:
- a signal adjusting circuit that receives a set pulse signal and a reset pulse signal and outputs a first reset signal obtained by masking out a pulse of the reset pulse signal during a period in which the set pulse signal and the reset pulse signal overlap with each other;
- an RS flip-flop circuit that receives a first set signal responsive to the set pulse signal at a set terminal thereof, receives the first reset signal at a reset terminal thereof and outputs a first control signal;
- and
- a first driver that controls the first output transistor according to the first control signal.
A gate driver circuit that controls a first output transistor connected to a first node at a first end of a current path thereof and a second output transistor connected to a second end of the current path of the first output transistor at a first end of a current path thereof and to a second node at a second end of the current path,
- wherein the gate driver circuit comprises:
- a signal adjusting circuit that receives a set pulse signal and a reset pulse signal and outputs a first reset signal obtained by masking out a pulse of the reset pulse signal during a period in which the set pulse signal and the reset pulse signal overlap with each other;
- an RS flip-flop circuit that receives a first set signal responsive to the set pulse signal at a set terminal thereof, receives the first reset signal at a reset terminal thereof and outputs a first control signal;
- and
- a first driver that controls the first output transistor according to the first control signal.
Dependencies are inferred from the claim text.