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US 2016/0079945 A1Published application
Programmable impedance network in an amplifier
OwnerRajendrakumar JOISHinventor
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Abstract
The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.
Claims20
An amplifier comprising:
- a first transistor configured to receive a first input;
- a second transistor configured to receive a second input;
- and
- a plurality of impedance networks coupled between the first transistor and the second transistor, at least one impedance network of the plurality of impedance networks comprising:
- a first impedance path configured to be activated during single ended operation;
- and
- a second impedance path configured to be activated during differential operation.
4 more elements
A method comprising:
- providing a first input and a second input to an amplifier, the amplifier comprises an impedance network;
- activating a first impedance path in the impedance network during single ended operation, the first impedance path comprises a first switch;
- and
- activating a second impedance path in the impedance network during differential operation, the second impedance path comprises a second switch, wherein during the single ended operation the first switch is activated and the second switch is inactivated such that a voltage swing across the first switch is less than a voltage swing across the second switch
1 more element
A receiver comprising:
- a receive antenna configured to receive a signal and configured to generate a first input and a second input;
- an amplifier coupled to the receive antenna, the amplifier comprising:
- a first transistor configured to receive the first input;
- a second transistor configured to receive the second input;
- and
- a plurality of impedance networks coupled between the first transistor and the second transistor, at least one impedance network of the plurality of impedance networks comprising:
- a first impedance path configured to be activated during single ended operation;
- and
- a second impedance path configured to be activated during differential operation;
- an IF filter coupled to the amplifier and configured to generate a filtered non-zero IF signal from a signal received from the amplifier;
- an ADC (analog to digital converter) coupled to the IF filter and configured to sample the filtered non-zero IF signal to generate a valid data;
- and
- a processor coupled to the ADC and configured to process the valid data.
10 more elements
Dependencies are inferred from the claim text.