Programmable filter in an amplifier
OwnerRajendrakumar JOISHinventor
Life of this patent
Estimating the term…
Abstract
The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.
Claims20
An amplifier comprising:
- a first transistor configured to receive a first input and configured to generate a first load current;
- a first output node coupled to a power supply through a first load resistor, the first load resistor configured to receive the first load current;
- a first capacitor network coupled to the first output node and configured to draw a first capacitive current from the first output node;
- and
- a first current buffer coupled between the first output node and the first transistor, wherein a current through the first current buffer is a summation of the first load current and the first capacitive current.
A method comprising:
- inactivating a primary switch;
- generating a first load current in response to a first input, the first load current received by a first load resistor;
- providing a first capacitive current to a first capacitor network;
- and
- providing a current that is a summation of the first load current and the first capacitive current to a first current buffer, the first current buffer coupled in parallel to the first capacitor network.
An amplifier comprising:
- a first output node coupled to a power supply through a first load resistor;
- a second output node coupled to the power supply through a second load resistor;
- a first current buffer coupled to the first output node;
- a second current buffer coupled to the second output node;
- a filter network coupled between the first output node and the second output node, the filter network comprising:
- a first capacitor network coupled between the first output node and the second current buffer;
- a second capacitor network coupled between the second output node and the first current buffer;
- and
- a primary switch coupled between the first capacitor network and the second capacitor network.
A receiver comprising:
- a receive antenna configured to receive a signal and configured to generate a first input and a second input;
- and
- an amplifier coupled to the receive antenna, the amplifier comprising:
- a first transistor configured to receive the first input and configured to generate a first load current;
- a first output node coupled to a power supply through a first load resistor, the first load resistor configured to receive the first load current;
- a first capacitor network coupled to the first output node and configured to draw a first capacitive current from the first output node;
- and
- a first current buffer coupled between the first output node and the first transistor, wherein a current through the first current buffer is a summation of the first load current and the first capacitive current;
- an IF filter coupled to the amplifier and configured to generate a filtered non-zero IF signal from a signal received from the amplifier;
- an ADC (analog to digital converter) coupled to the IF filter and configured to sample the filtered non-zero IF signal to generate a valid data;
- and
- a processor coupled to the ADC and configured to process the valid data.
Dependencies are inferred from the claim text.