Bias circuit, operational amplifier, and delta sigma type ad converter

An operational amplifier, comprising:

• first and second transistors that set bias currents according to a bias voltage;
• third and fourth transistors that constitute a differential stage, differential input signals being applied and the bias currents being supplied to the third and fourth transistors from the first and second transistors;
• a fifth transistor that is connected in common to the third and fourth transistors;
• and
• an adaptive timing control circuit that temporarily increases a tail current flowing from the differential stage to the fifth transistor, according to the timing at which a first control signal configured to control the input signal changes in level.

A ΔΣ-type AD converter, comprising:

• a subtractor that subtracts an analog output from an analog input;
• an integrator that integrates an output from the subtractor;
• a quantizer that quantizes an output from the integrator;
• and
• a switch circuit that outputs as the analog output a reference voltage that is switched between positive and negative polarities according to a digital output from the quantizer, wherein
• the integrator includes:
• an operational amplifier;
• and
• an adaptive timing control circuit that temporarily increases a tail current in the operational amplifier, according to a timing at which a first control signal configured to control the analog input changes in level.