Power Amplifier
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJun-De Jin
Life of this patent
Estimating the term…
Abstract
A power amplifier includes an input circuit configured to receive an input signal. At least two transistors connected in series. A first transistor of the at least two transistors is located at a first end of the at least two transistors. A second transistor of the at least two transistors is located at a second end of the at least two transistors. The first transistor is coupled to a low voltage power supply node. The first gate of the first transistor is coupled to a first bias voltage. The input signal is coupled to a first gate of the first transistor. At least one capacitor is coupled between a second gate of the second transistor and the low voltage power supply node. An output circuit coupled to a second gate of the second transistor.
Claims20
A power amplifier, comprising:
- an input circuit configured to receive an input signal;
- at least two transistors connected in series, wherein a first transistor of the at least two transistors is located at a first end of the at least two transistors, a second transistor of the at least two transistors is located at a second end of the at least two transistors, the first transistor is coupled to a low voltage power supply node, a first gate of the first transistor is coupled to a first bias voltage, and the input signal is coupled to the first gate of the first transistor;
- at least one capacitor coupled between a second gate of the second transistor and the low voltage power supply node;
- and
- an output circuit coupled to a second gate of the second transistor.
A power amplifier, comprising:
- an input circuit configured to receive an input signal;
- at least two transistor pairs connected in series, wherein a first transistor pair of the at least two transistor pairs is located at a first end of the at least two transistor pairs, a second transistor pair is located at a second end of the at least two transistor pairs, the first transistor pair is coupled to a low voltage power supply node, the first gates of the first transistor pair is coupled to a first bias voltage, and the first gates of the first transistor pair are arranged to receive differential signals from the input circuit;
- a first capacitor pair coupled between respective second gates of the second transistor pair and the low voltage power supply node;
- and
- an output circuit coupled to the second transistor pair and configured to provide an output signal.
A method, comprising:
- coupling an input node to a first gate of a first transistor, wherein the first transistor is located at a first end of at least two transistors connected in series, the first transistor is coupled to a low voltage power supply node;
- coupling a capacitor between a second gate of a second transistor of the at least two transistors and the low voltage power supply node, wherein the second transistor is located at a second end of the at least two transistors;
- and
- coupling the second transistor to an output node.
Dependencies are inferred from the claim text.