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US 2016/0079747 A1Published application
Back power protection circuit
AssigneeIntel Corporation
InventorsAmit Kumar Srivastava, KARTHIK NS, RAGHAVENDRA DEVAPPA SHARMA, DHARMARAY NEDALGI, PRASAD BHILAWADI
Life of this patent
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Abstract
Described is an apparatus which comprises: one or more signal lines; a transceiver coupled to the one or more signal lines; and a bias generation circuit to provide one or more bias voltages for the transceiver to tri-state the transceiver according to signal attributes of the one or more signal lines.
Claims20
An apparatus comprising:
- one or more signal lines;
- a transceiver coupled to the one or more signal lines;
- and
- a bias generation circuit to provide one or more bias voltages for the transceiver to tri-state the transceiver according to signal attributes of the one or more signal lines.
1 more element
An apparatus comprises:
- a transceiver operable to couple to a charging device external to the apparatus;
- a power-up detector to detect presence or absence of one or more power supplies to the transceiver;
- and
- a back power protection circuit to cause the transceiver to tri-state when the charging device is coupled to the transceiver and the power-up detector detects absence of the one or more power supplies.
1 more element
A system comprising:
- a memory;
- a processor coupled to the memory, the processor including:
- a transceiver operable to couple to a charging device external to the apparatus;
- a power-up detector to detect presence or absence of one or more power supplies to the transceiver;
- and
- a back power protection circuit to cause the transceiver to tri-state when the charging device is coupled to the transceiver and the power-up detector detects absence of the one or more power supplies;
- and
- a wireless interface for allowing the processor to communicate with another device.
5 more elements
Dependencies are inferred from the claim text.