Semiconductor devices including a stressor in a recess and methods of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-Suk SHIN, Chul-Woong Lee, Hoi-Sung Chung, Young-Tak Kim, Nae-In Lee
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Abstract
Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.
Claims30
A semiconductor device comprising:
- a substrate;
- a gate structure on the substrate;
- a spacer adjacent to a sidewall of the gate structure;
- and
- a semiconductor layer disposed adjacent to the gate structure and disposed in a recess that extends below an upper surface of the substrate, the semiconductor layer being a strain-inducing pattern,
- wherein a portion of the recess underlies the gate structure, and
- an interface between the spacer and the semiconductor layer located under the spacer is not below a lower surface of the gate structure.
A semiconductor device comprising:
- a substrate;
- a gate structure including a gate dielectric layer over the substrate and a gate electrode over the gate dielectric layer;
- a spacer adjacent to a sidewall of the gate electrode;
- and
- a semiconductor layer disposed adjacent to the gate structure and disposed in a recess that extends below an upper surface of the substrate, the semiconductor layer being a strain-inducing pattern,
- wherein a portion of the recess underlies the gate structure, and
- the spacer directly contacts the semiconductor layer above a lower surface of the gate dielectric layer.
A method for forming a semiconductor device, the method comprising:
- forming a gate structure over a semiconductor substrate, the gate structure including a gate insulating layer and a gate electrode over the gate insulating layer;
- forming a first spacer over the semiconductor substrate;
- forming a second spacer along a sidewall of the gate structure;
- forming a recess extending into the semiconductor substrate adjacent to the gate structure;
- removing at least a portion of the first spacer;
- and
- filling the recess with a stressor that directly contacts a bottom surface of the first spacer,
- wherein a contacting interface between the stressor and the bottom surface of the first spacer is not below a lower surface of the gate insulating layer, and
- the stressor is a strain-inducing pattern.
A semiconductor device comprising:
- a substrate;
- a gate structure disposed on the substrate;
- a spacer adjacent to a sidewall of the gate structure;
- and
- a semiconductor layer disposed adjacent to the gate structure and disposed in a recess that extends below an upper surface of the substrate, the semiconductor layer being a strain-inducing pattern,
- wherein a portion of the recess underlies the gate structure, and
- an interface between the spacer and the semiconductor layer located under the spacer is coplanar with a lower surface of the gate structure.
Dependencies are inferred from the claim text.