Semiconductor device and manufacturing method thereof

A semiconductor device comprising:

• a semiconductor substrate;
• a gate dielectric film on the semiconductor substrate;
• a gate electrode on the gate dielectric film;
• a first diffusion layer of a first conductivity type in a part of a surface of the semiconductor substrate under the gate dielectric film;
• a second diffusion layer of a second conductivity type in the semiconductor substrate under the first diffusion layer, the second conductivity type being a conductivity type different from the first conductivity type, the second diffusion layer being in contact with a bottom portion of the first diffusion layer and forming a PN junction with the bottom portion of the first diffusion layer;
• a drain layer of the first conductivity type in the semiconductor substrate on one side of the gate electrode;
• a source layer of the second conductivity type in the semiconductor substrate on other side of the gate electrode to be adjacent to the second diffusion layer;
• a first sidewall dielectric film on a side surface of the gate electrode and on a top surface of the first diffusion layer;
• a source epitaxial layer on the semiconductor substrate in a region of the source layer;
• and
• a conductive layer on the source epitaxial layer to be separated from the first diffusion layer, wherein
• a level of an interface between the semiconductor substrate and the source epitaxial layer is equal to or lower than a level of a bottom surface of the first diffusion layer.

A manufacturing method of a semiconductor device, the method comprising:

• introducing first conductivity type impurities for forming a first diffusion layer while introducing second conductivity type impurities for forming a second diffusion layer from a source-layer formation region to a diffusion-layer formation region adjacent to the source-layer formation region in a semiconductor substrate so that the second diffusion layer is in contact with a bottom portion of the first diffusion layer and forms a PN junction with the bottom portion of the first diffusion layer, the second conductivity type being a conductivity type different from the first conductivity type;
• forming a first sidewall dielectric film covering a side surface of a gate electrode above the semiconductor substrate to be located on a part of the first diffusion layer;
• etching a portion of a surface of the semiconductor substrate in the source-layer formation region using the first sidewall dielectric film as a mask to lower a top surface of the semiconductor substrate in the source-layer formation region to a position equal to or lower than a bottom surface of the first diffusion layer;
• and
• introducing second conductivity type impurities for forming a source layer into the source-layer formation region using the first sidewall dielectric film as a mask.