Method for the surface etching of a three-dimensional structure
AssigneeCommissariat A L'energie Atomique Et Aux Energies Alternatives
InventorsNicolas POSSEME, Christian ARVET, Sebastien BARNOLA
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Abstract
A method for etching a dielectric layer located on the surface of a three-dimensional structure formed on a face of a substrate oriented along a plane of a substrate, which includes a step of implanting ions so as to directionally create a top layer in the dielectric layer. Such top layer is thus not formed everywhere. Then, the layer in question is removed, except on the predefined zones, such as flanks of a transistor gate. A selective etching of the dielectric layer is executed relative to the material of the residual part of the top layer and relative to the material of the face of the substrate.
Claims20
A method for etching a dielectric layer located on the surface of a three-dimensional structure formed on a face of a substrate oriented along a plane of the substrate, with said structure comprising surfaces perpendicular to the plane of the substrate and surfaces parallel to the plane of the substrate, with the perpendicular surfaces comprising first flat perpendicular surfaces directed along a first orientation and second flat perpendicular surfaces directed along a second orientation different from the first orientation,
- said method comprising the following successive steps:
- forming a top layer covering the parallel surfaces and the first perpendicular surfaces by ionic implantation of at least one ion species into only a part of the thickness of the dielectric layer, with said implantation being so configured that the top layer does not cover the second perpendicular surfaces;
- partial removing of the top layer so configured as to totally remove the top layer on the parallel surfaces while keeping a residual part of the top layer on the first perpendicular surfaces;
- selective etching of the dielectric layer relative to the material of the residual part of the top layer and relative to the material of the face of the substrate.
A micro-electronic device comprising a substrate and, on a face of the substrate, a FinFET type transistor comprising:
- a gate located above a surface layer of the face of the substrate, with the surface layer being made of a semi-conductor material, with the gate comprising two parallel flanks perpendicular to a plane of the substrate,
- a channel having two fins, with each one being located on a different flank of the gate,
- on each flank, around the fin, a spacer formed with a dielectric layer,
- wherein the spacers comprise a top layer, above the dielectric layer, with the top layer being a layer of the material of the dielectric layer, wherein ions of at least one ion species are implanted.
Dependencies are inferred from the claim text.