Production of spacers at flanks of a transistor gate
AssigneesCommissariat A L'energie Atomique Et Aux Energies Alternatives, STMicroelectronics S.r.l., STMicroelectronics (Crolles 2) SAS
InventorsChristian ARVET, Sébastien BARNOLA, Sébastien LAGRASTA, Nicolas POSSEME
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Abstract
The production of spacers at flanks of a transistor gate, including a step of forming a dielectric layer covering the gate and a peripheral region of a layer of semiconductor material surrounding the gate, including forming a superficial layer covering the gate and the peripheral region; partially removing the superficial layer configured so as to completely remove the superficial layer at the peripheral region while preserving a residual part of the superficial layer at the flanks; and selective etching of the dielectric layer vis-à-vis the material of the residual part of the superficial layer and vis-à-vis the semiconductor material.
Claims20
A method for producing spacers at the flanks of a transistor gate, wherein the gate is situated above a layer of a semiconductor material, the method comprising successively the following steps:
- forming a dielectric layer that covers the gate and at least a peripheral region of the layer of semiconductor material surrounding the gate;
- forming a superficial layer covering the dielectric layer;
- partial etching of the superficial layer configured so as to completely remove the superficial layer at the peripheral region while preserving a residual part of the superficial layer at the flanks, and while at least partly preserving the dielectric layer at the peripheral region;
- then, after the partial etching, etching the dielectric layer selectively with respect to the residual part of the superficial layer and with respect to the layer of semiconductor material.
Dependencies are inferred from the claim text.