Device contact structures including heterojunctions for low contact resistance
AssigneeSamsung Electronics Co., Ltd.
InventorsJorge A. Kittl, Borna Josip Obradovic, Robert Christopher Bowen, Mark S. Rodder
Life of this patent
Estimating the term…
Abstract
A semiconductor device can include a channel region with a first semiconductor material for a majority carrier in the channel region during operation (on state) of the device and a metal contact. A source/drain region can include a semiconductor material alloy including a second semiconductor material and at least one heterojunction located between the metal contact and the channel region, wherein the heterojunction forms a band-edge offset for the majority carrier that is less than or equal to about 0.2 eV.
Claims19
A semiconductor device comprising:
- a channel region comprising a first semiconductor material for a majority carrier in the channel region during operation (on state) of the device;
- a metal contact;
- a source/drain region comprising a semiconductor material alloy including a second semiconductor material;
- and
- at least one heterojunction located in the source/drain region between the metal contact and the channel region, wherein the heterojunction forms a band-edge offset for the majority carrier that is less than or equal to about 0.2 eV.
An electronic device comprising:
- a channel region comprising a first semiconductor material for a majority carrier in the channel region during operation (on state) of the device;
- a metal contact;
- and
- a source/drain region comprising a material alloy including at least one material component and is free of all components of the first semiconductor material so that compositional grading of the material alloy between the channel region and an interface with the metal contact avoids an abrupt change in band-edge offset between increments in the compositional grading and at any heterojunction therein.
An electronic device terminal structure comprising:
- a metal contact;
- a graded composition layer including a first material (S1) and a second material (S2) combined with one another according to a grading composition within the graded composition layer given by S1xS21-x where the composition of the graded composition layer is about fully S2 proximate to the metal contact where x=0 and where the composition of the graded composition layer is about fully S1 remote from the metal contact where x=1, and wherein compositions of the graded composition layer between x=0 and x=1 are sufficient to avoid a band edge offset greater than 0.2 eV within the graded composition layer for a selected carrier of the device;
- a third material S3 contacting the graded composition layer at x=1, S3 being selected to form a heterojunction with S1 that is equal to or less than about 0.2 eV;
- and
- wherein S2 is selected to provide a Schottky barrier height with the metal that is equal to or less than about 0.2 eV.
Dependencies are inferred from the claim text.