Deep collector vertical bipolar transistor with enhanced gain

An integrated circuit, comprising:

• a deep collector vertical bipolar transistor further including:
• an emitter diffusion;
• a deep well diffusion that forms a collector of the deep collector vertical bipolar transistor;
• a base diffusion under the emitter diffusion and above collector and electrically isolated from a substrate of the integrated circuit;
• a first base tuning diffusion in the base diffusion and between emitter diffusion and the collector;
• a MOS transistor, the MOS transistor further including:
• a MOS gate dielectric layer;
• a MOS gate;
• a MOS source wherein the doping type of the MOS source is the same as the doping type of the emitter diffusion;
• a MOS drain;
• and
• a second base tuning diffusion under the MOS gate and under the MOS source and under the MOS drain wherein the second base tuning diffusion is sufficiently below the MOS source and MOS drain so MOS source and drain capacitance and breakdown voltage remain within specification limits.