Semiconductor device and method of manufacturing the same
AssigneeRenesas Electronics Corporation
InventorTsuyoshi Kachi
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AssigneeRenesas Electronics Corporation
InventorTsuyoshi Kachi
Estimating the term…
To realize a semiconductor device having a power MOSFET satisfying both a low conduction resistance and a high junction breakdown voltage by a simple and easy manufacturing method. Over an n-type substrate, a p-type epitaxial layer of a low concentration is formed, and, in an active part, a plurality of active regions is defined by a plurality of trenches that is formed in the epitaxial layer and extends in a first direction with first intervals in a second direction orthogonal to the first direction. In the epitaxial layer between the adjacent trenches, an n-type diffusion region that functions as a drain offset layer is formed, and, in the epitaxial layer between a side wall of the trench and the n-type diffusion region, a p-type diffusion region connected with a channel region (the p-type diffusion region) is formed, to constitute a super junction structure. Further, by forming an n-type diffusion region in the epitaxial layer, having a prescribed width from a side wall of a trench lying in the end part of the active part toward an outer periphery part, to achieve the improvement of a drain breakdown voltage.
1-19. (canceled)
A method of manufacturing a semiconductor device including an active part in which a power MOSFET is formed and an outer peripheral part formed around the active part, comprising the steps of:
Dependencies are inferred from the claim text.