Semiconductor device

A semiconductor device comprising:

• a first semiconductor region of a first conductivity type;
• a plurality of second semiconductor regions of a second conductivity type that are provided in the first semiconductor region in a second direction crossing the first direction, and extending in a first direction, and arranged along a second direction crossing the first direction;
• an element region that includes a third semiconductor region of the second conductivity type that is provided on the second semiconductor regions, a fourth semiconductor region of the first conductivity type that is selectively provided on the third semiconductor region, and a gate electrode disposed on a gate insulating layer that extends adjacent the third semiconductor region and the fourth semiconductor region;
• and
• a termination region having a plurality of first electrodes that include first portions extending in the first direction and second portions extending in the second direction on the first semiconductor region and the second semiconductor region, and an insulating layer that surrounds the element region and is provided between the first semiconductor region and the plurality of first electrodes, and between the second semiconductor region and the plurality of first electrodes, wherein a film thickness of a portion of the insulating layer overlying the second portion is thicker than a film thickness of the insulating layer overlying the first portion.

A method for forming a semiconductor device, the method comprising:

• forming a first semiconductor region of a first conductivity type;
• forming a plurality of second semiconductor regions of a second conductivity type in the first semiconductor region, each of the plurality of second semiconductor regions extending in a first direction, and arranged along a second direction crossing the first direction;
• forming an element region that includes a third semiconductor region of the second conductivity type on the second semiconductor region, a fourth semiconductor region of the first conductivity type that is selectively provided on the third semiconductor region, and a gate electrode that is disposed on a gate insulating layer that extends adjacent the third semiconductor region and the fourth semiconductor region;
• and
• forming a termination region surrounding the element region and having a plurality of first electrodes that include respective first portions extending in the first direction and second portions extending in the second direction on the first semiconductor region and the second semiconductor region, wherein an interval between adjacent first portions in the second direction is less than an interval between adjacent second portions in the first direction.