Cmos image sensor
AssigneesSTMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
InventorsNicolas Moeneclaey, Julien-Marc Roux, Jerome Bourgoin
Life of this patent
Estimating the term…
Abstract
A CMOS image sensor including: an array of M×N pixels, the pixels of a same column being connected to a same output track, each pixel including a photodiode, a sense node, a transfer transistor, a reset transistor, and a read circuit; and a test circuit including an assembly of N elementary reference cells respectively connected to the N output tracks of the sensor, each cell including a resistor, a sense node, a transfer transistor, a reset transistor, and a read circuit, the N resistors being series-connected between first and second nodes of application of a reference voltage.
Claims13
A CMOS image sensor comprising:
- an image array including M rows and N columns of pixels and N output conductive tracks corresponding respectively to the N columns, where for each column, the pixels of the column are connected to the corresponding output conductive track, and the pixels of different columns are connected to different output conductive tracks, each pixel including a photodiode, a sense node, a transfer transistor coupling the sense node to a first node of the photodiode, a reset transistor coupling the sense node to a pixel reset voltage node, and a read circuit coupling the sense node to the output conductive track corresponding to the column that includes the pixel;
- and
- a test circuit including a first assembly of N elementary reference cells respectively coupled to the N output conductive tracks, each elementary reference cell including a resistor, a sense node, a transfer transistor coupling the sense node of the elementary reference cell to a first node of the resistor, a reset transistor coupling the sense node of the elementary reference cell to a cell reset voltage node, and a read circuit coupling the sense node of the elementary reference cell to the output track to which the elementary reference cell is coupled, the resistors of said first assembly being series-coupled between first and second reference voltage nodes.
A method of operating a CMOS image sensor, the method comprising:
- resetting plural sense nodes of plural pixels, respectively, in a selected row an image array that includes M rows and N columns of pixels and N output conductive tracks corresponding respectively to the N columns, where for each column, the pixels of the column are connected to the corresponding output conductive track, and the pixels of different columns are connected to different output conductive tracks, each pixel including a photodiode, a sense node, a transfer transistor coupling the sense node to a first node of the photodiode, a reset transistor coupling the sense node to a pixel reset voltage node, and a read circuit coupling the sense node to the output conductive track corresponding to the column that includes the pixel, the resetting including turning on the reset transistors of the pixels of the selected row;
- reading a voltage of the sense node of each pixel in the selected row;
- turning on the transfer transistor of each pixel in the selected row;
- reading the voltage of the sense node of each pixel in the selected row;
- turning on transfer transistors of cells, respectively, in a row of a test circuit that includes a first assembly of N elementary reference cells respectively coupled to the N output conductive tracks, each elementary reference cell including a resistor, a sense node, a transfer transistor coupling the sense node of the elementary reference cell to a first node of the resistor, a reset transistor coupling the sense node of the elementary reference cell to a cell reset voltage node, and a read circuit coupling the sense node of the elementary reference cell to the output track to which the elementary reference cell is coupled, the resistors of said first assembly being series-coupled between first and second reference voltage nodes;
- reading a voltage of the sense node of each cell in the row of the test circuit;
- resetting the sense node of each cell in the row of the test circuit by turning on the reset transistor of each cell;
- and
- reading the voltage of the sense node of each cell in the row of the test circuit.
Dependencies are inferred from the claim text.