Methods of Fabricating Semiconductor Devices

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate having a cell region and a peripheral circuit region;
• forming a plurality of bit line structures on the substrate in the cell region and a gate structure having the same structure as each of the bit line structures on the substrate in the peripheral circuit region, the plurality of bit line structures extending in a first direction and being spaced apart from each other in a second direction that is perpendicular to the first direction by first grooves that extend in the first direction;
• forming multi-layered spacers on sidewalls of the bit line structures and the gate structure;
• forming an organic material layer in the first grooves, wherein the organic material layer covers top surfaces of the bit line structures and the gate structure;
• and
• planarizing the organic material layer using a chemical mechanical polishing (CMP) process to reduce a level difference of the organic material layer between the cell region and the peripheral circuit region.

A method of fabricating a semiconductor device, comprising:

• providing a substrate having a cell region and a peripheral circuit region;
• forming a plurality of bit line structures on the substrate in the cell region and a plurality of gate structures in the peripheral circuit region, wherein the plurality of bit line structures are separated by a plurality of grooves extending in a same direction as the plurality of bit line structures, and wherein the plurality of gate structures have a same height and a different pitch as the plurality of bit line structures;
• forming a sacrificial layer in the plurality of grooves, wherein the sacrificial layer is on top surfaces of the bit line structures and the gate structure;
• and
• planarizing the sacrificial layer until the top surfaces of the bit line structures and the gate structure are exposed.