Semiconductor device

A semiconductor device comprising:

• a first conductive portion on a first side of a shallow trench isolation (STI) region, the first conductive portion connected to a first nanowire;
• a second conductive portion on a second side of the STI region, the second conductive portion connected to a second nanowire;
• a first silicide portion over the first conductive portion, where the first conductive portion is connected, through the first silicide portion, to at least one of an input output (I/O) port, a first voltage supply (VDD), or a second voltage supply (VSS) through the first silicide portion;
• a second silicide portion over the first conductive portion, the second silicide portion adjacent the first nanowire and not in contact with the first silicide portion;
• and
• a third silicide portion over the second conductive portion, where the second conductive portion is connected, through the third silicide portion, to at least one of:
• the VSS or the VDD when the first conductive portion is connected to the I/O port;
• the VSS when the first conductive portion is connected to the VDD;
• or
• the VDD when the first conductive portion is connected to the VSS.

A semiconductor device comprising:

• a first transistor on a first side of a shallow trench isolation (STI) region, the first transistor comprising:
• a first conductive portion formed within a well having a first conductivity type, the first conductive portion having a second conductivity type;
• a first nanowire connected to the first conductive portion;
• a first gate surrounding the first nanowire;
• and
• a first active area over the first nanowire and having the second conductivity type;
• and
• a second transistor on a second side of the STI region, the second transistor comprising:
• a second conductive portion formed within the well, the second conductive portion having the second conductivity type;
• a second nanowire connected to the second conductive portion and to the first nanowire;
• a second gate surrounding the second nanowire and connected to the first gate by a gate connection;
• and
• a second active area over the second nanowire and having the second conductivity type.