Wafer process for molded chip scale package (mcsp) with thick backside metallization

A wafer process for molded chip scale package (MCSP) for packaging semiconductor chips formed at a front surface of a semiconductor wafer, each semiconductor chip comprising a plurality of metal bonding pads formed on a respective front surface of said each semiconductor chip, the wafer process comprising the steps of:

• forming a respective metal bump on each of the plurality of metal bonding pads;
• forming a first packaging layer at the front surface of the semiconductor wafer to cover the metal bumps, wherein a radius of the first packaging layer is smaller than a radius of the semiconductor wafer so as to form an un-covered ring at an edge of the semiconductor wafer, and wherein two ends of each scribe line of a plurality of scribe lines are located between two adjacent semiconductor chips and extend to a front surface of the un-covered ring;
• thinning the first packaging layer to expose the metal bump from the first packaging layer;
• forming a respective cutting groove on a front surface of the thinned first packaging layer along said each scribe line by cutting the first packaging layer along a straight line connecting the two ends of said each scribe line exposed on the front surface of the un-covered ring;
• grinding at a back surface of the semiconductor wafer to form a recessed space at the back surface of the semiconductor wafer and a support ring at the edge of the semiconductor wafer;
• depositing a metal seed layer at a bottom surface of the semiconductor wafer in the recessed space;
• cutting off an edge portion of the semiconductor wafer;
• flipping and mounting the semiconductor wafer on a substrate, the thinned first packaging layer being directly attached to a top surface of the substrate;
• depositing a metal layer covering the metal seed layer;
• removing the substrate from the semiconductor wafer;
• and
• separating individual semiconductor chips from the semiconductor wafer by cutting through the first packaging layer, the semiconductor wafer, the metal seed layer and the metal layer along the cutting grooves, wherein the first packaging layer is cut into a plurality of top packaging layers, wherein a respective top packaging layer of the plurality of top packaging layers covers the front surface of said each semiconductor chip, wherein the respective metal bump is exposed from the respective top packaging layer of said each semiconductor chip, wherein the metal layer is cut into a plurality of bottom metal layers, and wherein a respective bottom metal layer of the plurality of bottom metal layers covers a back surface of said each semiconductor chip.