High density substrate routing in bbul package

A device including:

• a substrate including a conductive bus on or at least partially therein;
• a first die at least partially embedded in the substrate, the first die including a first plurality of high density interconnect pads and a first plurality of low density interconnect pads, the first plurality of low density interconnect pads electrically coupled to the bus;
• a second die at least partially embedded in the substrate, the second die including a second plurality of high density interconnect pads and a second plurality of low density interconnect pads, the second plurality of low density interconnect pads electrically coupled to the bus;
• and
• a high density interconnect element embedded in the substrate, the high density interconnect element including a third plurality of high density interconnect pads each electrically coupled to an interconnect pad of each of the first and second plurality of high density interconnect pads, wherein the high density interconnect element is selected from a group including a silicon die interconnect bridge and a glass die interconnect bridge.

A device comprising:

• a substrate;
• a first die at least partially embedded in a first layer of the substrate, the first die including a first plurality of high density interconnect pads and a first plurality of low density interconnect pads on a first side thereof;
• a second die at least partially embedded in the first layer of the substrate, the second die including a second plurality of high density interconnect pads and a second plurality of low density interconnect pads on a first side thereof;
• a high density interconnect element embedded in the substrate in a different layer than the first layer, the high density interconnect element including a third plurality of high density interconnect pads on a side facing the first and second dies, one or more interconnect pads of the third plurality of high density interconnect pads electrically coupled to an interconnect pad of the first and second plurality of high density interconnect pads;
• and
• a plurality of vias in different layers of the substrate than the first layer, a via of the plurality of vias electrically connected to a respective interconnect pad of the first and second pluralities of low density interconnect pads.