Semiconductor memory device and method for manufacturing same

A semiconductor memory device comprising:

• an array chip including a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells and not including a substrate;
• a circuit chip including a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit, the circuit chip being stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer;
• a bonding metal provided between the memory-side interconnection layer and the circuit-side interconnection layer, and bonded to the memory-side interconnection layer and the circuit-side interconnection layer;
• a pad provided in the circuit chip;
• and
• an external connection electrode reaching the pad from a surface side of the array chip.

A method for manufacturing a semiconductor memory device, comprising:

• sticking together an array wafer and a circuit wafer, the array wafer including a first substrate, a three-dimensionally disposed plurality of memory cells provided on the first substrate, a memory-side interconnection layer connected to the memory cells, and a first bonding metal connected to the memory-side interconnection layer, the circuit wafer including a second substrate, a control circuit provided on the second substrate, a circuit-side interconnection layer provided on the control circuit and connected to the control circuit, and a second bonding metal connected to the circuit-side interconnection layer, the first bonding metal and the second bonding metal being bonded to each other;
• removing the first substrate of the array wafer after sticking together the array wafer and the circuit wafer;
• forming a via from a surface side of the array wafer from which the first substrate is removed;
• and
• forming an external connection electrode in the via.