Semiconductor package

A semiconductor package comprising:

• a plurality of semiconductor chips stacked on a substrate, including a first semiconductor chip comprising:
• a through-electrode penetrating the first semiconductor chip;
• a first passivation layer formed on an upper surface of the first semiconductor chip;
• a second passivation layer formed on an upper surface of the first passivation layer;
• and
• a first electrode pad contacting an upper surface of the second passivation layer, extending in parallel with the upper surface of the second passivation layer, and including a portion penetrating the second passivation layer to contact the upper surface of the first passivation layer;
• and
• a second semiconductor chip of the plurality of the semiconductor chips electrically coupled to the first electrode pad of the first semiconductor chip.

A semiconductor package, comprising:

• a semiconductor chip;
• a through-electrode penetrating the semiconductor chip;
• a first passivation layer formed on an upper surface of the semiconductor chip;
• a second passivation layer formed on an upper surface of the first passivation layer;
• and
• an electrode pad electrically connected to the through-electrode, penetrating the second passivation layer, and contacting the first passivation layer.