Fully-depleted silicon-on-insulator transistors

A method of manufacturing a semiconductor structure, comprising:

• forming a well in a substrate;
• forming a first PFET, a second PFET, and a third PFET on a buried oxide (BOX) layer and over the well;
• forming a first NFET, a second NFET, and a third NFET on the BOX layer and over the substrate;
• biasing the well to a first voltage;
• and
• biasing the substrate to a second voltage different than the first voltage,
• wherein the first PFET, the second PFET, and the third PFET each has a different threshold voltage, and
• the first NFET, the second NFET, and the third NFET each has a different threshold voltage.