Wafer with improved plating current distribution

A method of manufacture of a semiconductor wafer, comprising the steps of:

• forming a first integrated circuit on a first die of said semiconductor wafer and forming a second integrated circuit on a second die of said semiconductor wafer;
• forming a first die seal at the perimeter of said first die and a second die seal at the perimeter of said second die;
• and
• forming an electrically conductive link between said first and the second die seals.

A method of electroplating a semiconductor wafer, comprising the steps of:

• providing a semiconductor wafer comprising a plurality of dies, each of said plurality of dies comprising a plurality of semiconductor devices, a plurality of die seals, each of said plurality of die seals being formed at a perimeter of one of said plurality of dies, and a plurality of electrically conductive links, each of said plurality of electrically conductive links connecting one of said plurality of die seals with another one of said plurality of die seals;
• immersing said semiconductor wafer in an electrolyte bath containing copper;
• applying a cathode to an edge of said semiconductor wafer;
• immersing an anode in said electrolyte bath;
• and
• applying a voltage to at least one of said cathode and said anode to deposit a copper-based material on the surface of said semiconductor wafer.